Power and temperature limits for film capacitors in LLC halfbridge converters
I have been writing a technical training session on the LLC halfbridge converter, and one part that I believe is critical but doesn’t get the attention it merits is the reliability of the capacitor used in the resonant tank on the primary. Every LLC I’ve ever seen or designed used a 400VDC to 450VDC input bus, and every calculation I’ve ever done required a capacitance between 10 nF and 100 nF. For safety and engineering margin, that means that a DC voltage rating of around 500V or more is needed. The only capacitor type I know of that makes sense is a film capacitor. I discounted ceramic capacitors because of their capacitance loss vs. DC voltage.
From about half of max power to max output power, the current waveform in the resonant tank is nearly a pure sinusoid, so its RMS value is lower than a trapezoid wave or square wave of equal peak-peak amplitude – but even at a relatively low power such as the 120W of my test subject for this post the RMS current is around 850 mA. My test subject is the STEVAL-ILL052V1, an evalboard available from ST. For this post, I tested it with 300VDC applied to the main input, which is a boost PFC that outputs 450VDC. Here’s a scope capture of the current in the resonant tank and the voltage across the capacitor:
You can see why a ceramic capacitor with a widely-changing capacitance vs. DC voltage would be an absolute nightmare – there is 250VDC of voltage shift each cycle! The resonant tank capacitor is the B32652A0153K000 from Epcos, a 15 nF device rated to 1 kVDC or 250 VACrms. Its dimensions (this will be important later on) are: L x W x H = 18 x 5 x 10.5 mm. The datasheet notes “high pulse strength” and “for electronic ballasts and switch-mode power supplies”. The temperature rating is from -55ºC to 110ºC, and I assume that means the sum of ambient temperature plus the temp rise from internal heating. What isn’t listed is an RMS current rating. The purpose of the post is to try and determine the reliability of this and other film caps based on information that is provided in the datasheets.
This family of film caps doesn’t provide ESR values either, but it does list dissipation factor, tan(sigma), at various frequencies. The resonant frequency of this test converter is almost exactly 100 kHz, and for family members less than 27 nF at 100 kHz, tan(sigma) is listed as 0.002. We can then calculate ESR:
ESR = (tan(sigma)) / (2*pi*fo*Cr), where “fo” is the resonant frequency and “Cr” is the resonant capacitance. ESR = 0.22ohm. That fits pretty well with the impedance curve shown farther on in the datasheet, if we assume that the minima represent ESR – I read about 150 mohm from that chart.
Power dissipation in the cap would then be somewhere between 0.85A^2 * 0.15ohm = 110 mW and 0.85A^2 * 0.22ohm = 160 mW. I set the converter up and duct-taped a thermocouple to Cr – it’s the grey blur in the middle on the right in the photo below:
T1 shows 37.3ºC, and T2, right at the bottom in middle, shows 22.7ºC in my lab. I took this photo after the system ran for about half an hour. The load voltage and current can be seen in the background. Empirically we now have a junction-to-ambient thermal resistance value range: deltaT = 14.6ºC at 160 mW, so thetaJA ranges from 91ºC/W (assuming 160 mW) to 133ºC/W (assuming 110 mW).
I found an app note from Vishay: https://www.google.es/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=0ahUKEwjWv9Hi4Y_KAhUEVhoKHXoiCv8QFggyMAA&url=http%3A%2F%2Fwww.vishay.com%2Fdocs%2F26033%2Fgentechinfofilm.pdf&usg=AFQjCNFqu8LUJl4uVqJpdj0SCz3pKsFRcA entitled “General Technical Information – Film Capacitors” in which an estimation of temp rise based upon power dissipation, surface area of the capacitor and a heat transfer coefficient, alpha. Alpha for “plastic boxes with a smooth surface” is listed as 0.96 (mW)/(ºC*cm^2). That seems to apply to all the film caps I’ve ever worked with. I use similar formulas for aluminum caps, except that the formulas have an extra step where internal temperature is calculated and then extrapolated to the temperature at the top of the cap. Vishay says that temp rise, deltaT is:
deltaT = (Power dissipated in Cr) / (alpha * Surface Area in cm^2). Again, I’m assuming that this is the core temperature, not the surface temp. I calculate 6.63cm^2 of total surface area. That comes out to around 26ºC. There could be a 11ºC difference between core temp and surface temp, but this also made me curious, so I measured the actual ESR of the resonant capacitor:
The average resistance between 1 kHz and 10 kHz, where the results are real and positive, is around 50 mohm. If I go back and substitute that value into my power dissipation I get a temp rise of only 6ºC.
My goal is not to predict temperature rise exactly – in any real design I would always make extensive, actual temp readings to be sure of any component I think will dissipate some power – but I do want a set of equations that overdesign for safety margin. Right now the jury is still out on how to refine the approach I’ve just outlined.